Hossein Askari is a research engineer with 11 years of experience focused on making deep neural networks more computationally efficient through novel algorithms and custom hardware. He holds a PhD in Electrical and Electronics Engineering and has transitioned from academic acceleration of DNNs to applied research roles, including six years as an AI research scientist at Deeplite and a current research engineering role at Meta. His background spans hardware verification and embedded systems—evidenced by contributions to the RISC-V PULP Ara vector unit where he implemented fixed-point vector instructions and refactored hardware code to lowRISC standards. Comfortable moving between C++ verification, hardware design, and machine learning research, he combines rigorous engineering discipline with practical system-level optimizations. Colleagues describe him as someone who bridges theory and silicon, turning efficiency ideas into testable hardware-software implementations.
11 years of coding experience
9 years of employment as a software developer
Phd, Electrical and Electronics Engineering, Phd, Electrical and Electronics Engineering at École Polytechnique de Montréal
Master of Science (M.Sc.), Electrical and Electronics Engineering, Master of Science (M.Sc.), Electrical and Electronics Engineering at Concordia University
Bachelor of Science (BSc), Electrical and Electronics Engineering, Bachelor of Science (BSc), Electrical and Electronics Engineering at Shahid Bahonar University of Kerman
The PULP Ara is a 64-bit Vector Unit, compatible with the RISC-V Vector Extension Version 1.0, working as a coprocessor to CORE-V's CVA6 core
Role in this project:
Embedded Systems Engineer / IoT Developer
Contributions:6 reviews, 36 commits, 10 PRs in 1 year 6 months
Contributions summary:Hossein primarily focused on modifying and improving the `ara` project's hardware components, particularly those related to the vector unit. Their contributions include refactoring code to adhere to the lowRISC coding style and fixing saturation flags for vector add instructions. They also added support for fixed-point vector instructions and updated test cases to align with these changes, reflecting a deep understanding of the RISC-V Vector Extension and associated hardware.
The PULP Ara is a 64-bit Vector Unit, compatible with the RISC-V Vector Extension Version 0.10, working as a coprocessor to CORE-V's CVA6 core
Contributions:1 review, 5 PRs, 101 pushes in 2 years 6 months
risc-vpulp64-bitunitara
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