Hsiangkai Wang is a seasoned compiler and debugger engineer with 13 years of experience building low-level tooling for LLVM, Clang, OpenOCD and vendor toolchains, currently advancing ML compiler work at Arm. He has a strong track record of upstream LLVM contributions—particularly in MLIR/SPIR-V enhancements and numerical optimizations such as Winograd Conv2D—and has driven AArch64/SME and RISC-V V-extension work at Google and SiFive. His background spans embedded debug stacks (GDB/OpenOCD), target-specific codegen, and performance benchmarking automation across gem5/QEMU and SPEC suites. Notably, he has improved debug-info generation, ThinLTO performance, and implemented codegen optimizations like FastISel and tailcall for RISC architectures. Based in Cambridge, he blends systems-level pragmatism with upstream open-source influence, and once took eight months off to personally support his young daughter’s social development—a choice that speaks to his pragmatic prioritization and leadership off the keyboard.
13 years of coding experience
16 years of employment as a software developer
Master of Science (MS), Computer Science, Master of Science (MS), Computer Science at National Taiwan University
Bachelor of Science (BS), Computer Science, Bachelor of Science (BS), Computer Science at National Chung Cheng University
The LLVM Project is a collection of modular and reusable compiler and toolchain technologies.
Role in this project:
Backend Developer
Contributions:103 reviews, 49 PRs, 153 pushes in 5 years 1 month
Contributions summary:Hsiangkai contributed to the LLVM Project, specifically focusing on the MLIR (Multi-Level Intermediate Representation) dialect. Their work included adding new features to the SPIR-V dialect, such as the `NoContraction` op decoration and the `target width` attribute to the SPIR-V ABI, enhancing code generation capabilities. They also implemented a Winograd Conv2D algorithm, defining operators and converting `conv_2d_nhwc_fhwc` operations, demonstrating expertise in compiler optimization and numerical computation within the MLIR framework. Additionally, they refactored and cleaned up existing fusion tests.
Official OpenOCD Read-Only Mirror (no pull requests)
Role in this project:
Back-end Developer & Embedded Systems Engineer
Contributions:31 commits in 10 months
Contributions summary:Hsiangkai primarily contributed to the OpenOCD project by implementing and refining low-level functionalities, especially related to hardware debugging and communication with embedded systems. Their work involved fixing bugs in the GDB server, adding support for the Andes AICE debugger, and adding new target types for Andes processors. Moreover, the user focused on improving the overall efficiency and stability of the debugging process.
openocdpull-requestsread-only
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