Hwa-shan Huang
Assistant Technical Manager at Novatek Microelectronics Corp.
Hsinchu City, Taiwan, Taiwan
Summary
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Senior🎓
Top SchoolHwa-shan Huang is an Assistant Technical Manager with 8 years of hands-on experience in computer architecture, SoC integration, hardware-software interfaces, and FPGA prototyping, currently driving digital architecture and physical implementation at Novatek in Hsinchu. He has led end-to-end projects from RTL through ASIC flow—most recently a RISC-V RV32I 3-stage CPU taped out on SkyWater 130nm—and routinely verifies designs with industry suites like UCB EECS151 and OpenSTA. His background spans protocol bridges (AHB5 to SiFive TL-UL), high-speed video interfaces (V-by-One, MIPI C-/D-PHY, DSI2), and compact MCU cache redesigns that dramatically reduced SRAM area while preserving performance. Known for turning legacy IP and verification databases into modern, FPGA-validated flows, he blends pragmatic silicon-aware RTL design with system-level validation on platforms like HAP80, VCU108 and ZCU104. Colleagues rely on him to resolve timing-closure and physical verification challenges, and his toolset includes Synopsys suite, UVM-based verification, and FPGA prototyping at scale. An engineer who pairs deep low-level expertise with a knack for practical automation, he often ships creative testbenches and physical validation tools that accelerate whole-chip signoff.
8 years of coding experience
11 years of employment as a software developer
Master's degree Control and Electronic Engineering, Master's degree Control and Electronic Engineering at National Chiao Tung UniversityBachelor's degree Electrical Engineering, Bachelor's degree Electrical Engineering at National Changhua University of Education
English, traditional chinese
Github Skills (2)
debug7
risc-v5
Github contributions (5)
watz0n/vsd-hdp
Nov 2022 - Feb 2023
Contributions:77 pushes, 1 branch in 2 months
watz0n/learn-rv32i-arty
Feb 2018 - Mar 2018
Contributions:16 commits, 15 pushes, 1 branch in 24 days
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