Ishan Bansal is a Senior ASIC Design Engineer at NVIDIA with a decade of experience in RTL design, verification, and CPU system address map development. He holds a Master's in Electrical and Computer Engineering from UT Austin and graduated top of his class in B.Tech (Honours) from IIIT Hyderabad, combining strong academic pedigree with hands-on silicon experience. His background spans ASIC RTL design, regression bring-up, coverage closure, formal verification, and UVM testbench development, plus internships and research roles that include FPGA-based vision and motor-control projects. An active open-source firmware contributor (Timvideos) and former GSOC implementer of a streaming JPEG encoder, he brings both production-grade engineering and community-driven development to complex hardware-software problems. Based in California and known for delivering under tight deadlines, he excels at turning intricate architecture requirements into reliable, testable RTL.
10 years of coding experience
6 years of employment as a software developer
Secondary and Senior Secondary education, Secondary and Senior Secondary education at Y.S. Public School, Barnala
Master's degree Electrical and Computer Engineering, Master's degree Electrical and Computer Engineering at The University of Texas at Austin
Bachelor of Technology ( Honours ) Electronics and Communications Engineering, Bachelor of Technology ( Honours ) Electronics and Communications Engineering at International Institute of Information Technology Hyderabad (IIITH)
This repository contains the code of ShadowDraw to improve the drawing skills of the people not having a good hand with drawing images. Done as a part of Digital Image Processing Course Project
Contributions:1 PR, 13 pushes, 1 branch in 1 month
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Ishan Bansal - Senior ASIC Design Engineer at NVIDIA