Ivan聽Vignolles
Digital Design Division Manager at Stratum Labs
Argentina
Summary
馃懁
Senior馃帗
Top SchoolIvan Vignolles is a Digital Design Division Manager and engineer with 10 years' experience designing RTL, DSP/FEC blocks, and system-level software using Verilog, C and Python. He combines hands-on RTL and FPGA implementation experience from research projects and Marvell with current leadership at Stratum Labs, bridging low-level hardware design, compilers, OS development and HPC workflows. His background includes applied research in coherent optical communications and published FPGA convolution work, reflecting a strong mix of theory and practical verification. Based in Argentina and nearly finished with a computer engineering degree from UNC, he brings a pragmatic, research-informed approach to building high-performance digital systems and tooling.
9 years of coding experience
2 years of employment as a software developer
Ingeniero, Computacion, Ingeniero, Computacion at Universidad Nacional de C贸rdoba
English, German, Spanish
Github Skills (36)
verilog10
eda10
vhdl10
fpga10
python9
abstraction9
asic9
package-manager9
locker8
cli7
shell6
altera6
zsh6
chisel6
partitioning6
Programming languages (6)
Github contributions (5)
ivanvig/MIPS
Mar 2019 - Oct 2020
Contributions:95 commits, 5 pushes, 1 branch in 1 year 7 months
yoojuaan/Parcial-2-Algoritmos
Jun 2016 - Jan 2019
Contributions:2 PRs, 1 push, 1 branch in 2 years 7 months
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