Jake Mercer
Senior Embedded Software Engineer at Xirgo Technologies
Craigavon, Northern Ireland, United Kingdom
Summary
👤
Senior🎓
Top SchoolJake Mercer is a Senior Embedded Software Engineer with nine years of hands-on experience designing and shipping firmware and embedded systems across industrial and product environments. Based in Craigavon, Northern Ireland, he has progressed from placement and graduate roles at Civica to senior engineering at Civica and Xirgo Technologies, pairing academic MEng training with practical system-level expertise. He focuses on build automation, code quality, and testing in FPGA and embedded toolchains—evidenced by contributions to the widely used f4pga/prjxray project where he improved build processes and DSP fuzzer tooling. An engineer at heart, Jake runs side projects and experiments that fuel his curiosity and drive continuous improvement in delivery pipelines. Comfortable bridging hardware and software, he brings pragmatic problem-solving, meticulous release engineering, and a knack for making complex low-level systems more robust and maintainable.
9 years of coding experience
9 years of employment as a software developer
A*ABB A-levels, A*ABB A-levels at Portadown CollegeMaster of Engineering (MEng) Electrical and Electronics Engineering, Master of Engineering (MEng) Electrical and Electronics Engineering at Queen's University Belfast
English, Spanish
Github Skills (8)
fpga10
verilog10
automation10
automations10
xilinx10
toolchain9
makefile9
fuzzing8
Programming languages (6)
Github contributions (5)
f4pga/prjxray
Sep 2019 - Nov 2019
Documenting the Xilinx 7-series bit-stream format.
Role in this project:
Automation Engineer / Build & Release Engineer
Automation Engineer / Build & Release EngineerContributions:17 commits, 7 PRs, 34 comments in 1 month
Contributions summary:Jake focused on improving code quality and build processes within the repository. They addressed whitespace issues to ensure consistent code formatting and implemented a "make format-trailing-ws" recipe. They also made modifications to the DSP fuzzer, adding ports and moving the DSP instances inside an ROI module. These changes indicate a focus on automated builds, code quality, and potentially testing within the context of FPGA development.
vivadoartix7xilinxsymbiflowxilinx-fpga
JakeMercer/prjxray
Sep 2019 - Nov 2019
Documenting the Xilinx 7-series bit-stream format.
Contributions:44 pushes, 7 branches in 1 month
xilinxstreambitstream-format
Find and Hire Top DevelopersWe’ve analyzed the programming source code of over 60 million software developers on GitHub and scored them by 50,000 skills. Sign-up on Prog,AI to search for software developers.