Summary
Jan Marjanovič is a Principal FPGA Engineer based in Berkeley with 11 years of experience designing mission-critical electronics for experimental physics and quantum computing. He has a proven track record delivering MicroTCA-based modular systems, high-speed data acquisition on Zynq UltraScale+ MPSoC, and FPGA IPs for Ethernet, PCIe and DDR4 used at world-class research facilities. Equally comfortable in low-level RTL and higher-level flows, he champions emerging approaches like Chisel and Vivado HLS to tame parallelism and accelerate development. Beyond product delivery he has led board bring-ups, BSP development, training courses for hundreds of engineers, and tutored peers at international workshops—evidence of both hands-on depth and community impact. Notably, his designs have transitioned from lab prototypes to widely adopted platforms across accelerator and synchrotron installations.
11 years of coding experience
10 years of employment as a software developer
Diploma (Master's Degree) Electronics, Diploma (Master's Degree) Electronics at University of Ljubljana
Slovenian, English, Italian, German