Jaroslaw Stelter
Senior Software Eng. at Intel Corp.
Gdańsk, Pomeranian Voivodeship, Poland
Summary
🤩
Rockstar🎓
Top SchoolJaroslaw Stelter is a Senior Software Engineer based in Gdańsk, Poland, with four years of hands-on experience in embedded systems and back-end integration at Intel. He has contributed to high-profile open-source projects like Sound Open Firmware and Zephyr RTOS, where he integrated Intel IADK modules, implemented C++/C wrappers, and defined board-level device trees and driver shims for the Lunar Lake platform. Holding a PhD in Electronic Engineering and a master's in Computer Science with biomedical specialization, he combines deep academic rigor with practical firmware and hardware-register programming skills. Known for resolving tricky IPC, compilation, and power-management issues, he excels at bridging third-party frameworks with base firmware to deliver robust audio and IoT subsystems. An unexpected strength is his academic teaching and research background, which informs a methodical, systems-level approach to embedded software design.
4 years of coding experience
7 years of employment as a software developer
PhD, Electronic Engineering, PhD, Electronic Engineering at Gdańsk University of Technology
Github Skills (15)
firmware10
embedded-language10
embedded10
rtos10
c-language10
cprogramming-language10
microcontroller10
sys10
zephyr10
dspic9
dspace9
device-tree9
audio9
bluetooth-le4
bluetooth4
Programming languages (2)
Github contributions (5)
thesofproject/sof
May 2022 - Dec 2022
Sound Open Firmware
Role in this project:
Back-end Developer / Embedded Systems Engineer
Back-end Developer / Embedded Systems EngineerContributions:199 reviews, 25 commits, 33 PRs in 6 months
Contributions summary:Jaroslaw primarily worked on integrating 3rd party Intel IADK Framework modules within the Sound Open Firmware (SOF) project. They added C++ to C wrappers for the ProcessingModuleInterface and implemented a system agent component for communication with the base firmware. The user also focused on adapting the module interface and configuration handling for IADK modules. In addition, they fixed several compilation issues and improved IPC4 integration.
firmwaremidiaudiodspsound
zephyrproject-rtos/zephyr
Jun 2022 - Jul 2024
Primary Git Repository for the Zephyr Project. Zephyr is a new generation, scalable, optimized, secure RTOS for multiple hardware architectures.
Role in this project:Embedded Systems Engineer / IoT Developer
Embedded Systems Engineer / IoT DeveloperContributions:95 reviews, 16 PRs, 20 comments in 2 years 1 month
Contributions summary:Jaroslaw primarily contributed to the Zephyr RTOS project by implementing and defining board-specific configurations and device tree definitions for the Intel ACE 2.0 Lunar Lake (LNL) platform. Their work involved adding memory definitions, shim register definitions, and updating power and status registers. They also added and modified DMIC and SSP driver shims, which included programming hardware registers for audio interface setup, and resolving power-related issues.
bluetooth-lereal-timezephyrsecuregit-repository
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