Javier Setoain
Senior Member Of Technical Staff at AMD
Cambridge, England, United Kingdom
Summary
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Rockstar🎓
Top SchoolJavier Setoain is a Senior Member of Technical Staff at AMD with eight years of industry experience and a PhD in Computer Science, specializing in high-performance architectures, compilers, and ML-oriented domain-specific languages. He previously led compiler research at Arm as Technical Lead of the Arm‑BSC Center of Excellence, bridging academic rigor with production-focused engineering. Javier has deep hands‑on expertise in CPU/ARM architecture internals—his open-source contributions to the widely used gem5 simulator include ARM-specific syscall and pthread support plus SVE instruction implementations. His background spans bioinformatics web services, VoIP systems, GPU and vector algorithms, and systems administration, giving him a rare full-stack perspective from silicon-aware compilers to deployed services. Colleagues know him for translating complex architectural concepts into practical compiler and simulator features that accelerate ML and HPC workloads.
8 years of coding experience
17 years of employment as a software developer
Bachelor of Science (BSc), Computer Science and Engineering, Bachelor of Science (BSc), Computer Science and Engineering at Universidad Complutense de Madrid
English, Spanish
Github Skills (14)
simulations10
vector10
simulation10
arm10
c-language10
sve10
architectures10
cprogramming-language10
scalable10
assembler10
architecture10
risc-v9
system-calls9
modeling8
Programming languages (5)
Github contributions (5)
gem5/gem5
Apr 2018 - Mar 2019
The official repository for the gem5 computer-system architecture simulator.
Role in this project:
Back-end Developer
Back-end DeveloperContributions:6 commits in 11 months
Contributions summary:Javier primarily contributed to the gem5 project by implementing and modifying system calls related to threading and file system operations, specifically for the ARM architecture. Their work included adding support for `getdents64` and implementing functionalities required for `pthreads`. They also focused on adding new features related to SVE load/store structures and implemented the SVE LD1RQ[BHWD] instructions, demonstrating a good understanding of the project's architecture and instruction set extensions.
storedsimulationupstreamsimulatorgem5-simulator
jsetoain/llvm-project
Sep 2020 - Jan 2025
The LLVM Project is a collection of modular and reusable compiler and toolchain technologies. Note: the repository does not accept github pull requests at this moment. Please submit your patches at http://reviews.llvm.org.
Contributions:500 pushes, 92 branches in 4 years 4 months
compilerstechnologiesclangsubmittoolchain
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