Summary
Jeff Tsai is a senior manager and seasoned semiconductor engineer with 11 years of experience designing high-speed SerDes and physical-layout solutions across advanced nodes (3nm–28nm) at Marvell, Synopsys, and Intel. He combines hands-on technical depth—working on 112G and PCIe6 SerDes and automation for CAD flows—with proven team leadership and project execution in product-focused environments. A University of Toronto MEng (3.93 GPA) graduate, Jeff has a track record of building scalable automation and verification flows that accelerated library and IP development. Based in Toronto, he’s motivated by next‑generation product challenges and brings a pragmatic, systems-level view that bridges circuit design, layout automation, and cross-functional delivery.
11 years of coding experience
8 years of employment as a software developer
High School Diploma, High School Diploma at Lord Byng Secondary
Master of Engineering - MEng, 3.93 CGPA, Master of Engineering - MEng, 3.93 CGPA at University of Toronto
English, Chinese, French, Mandarin