Jeffrin Thottan
Design Verification Engineer
Kerala, India
Summary
👤
Senior🎓
Top SchoolJeffrin Thottan is a seasoned Design Verification Engineer with 15 years of VLSI and verification experience, currently driving verification efforts at Wipro Limited. He specializes in UVM and SystemVerilog for functional verification, coverage-driven testing, testbench enhancement, and regression cleanup across protocols including PCIe, USB, AHB, AXI-Stream and emerging UCIE work. Known for strong GLS and X-prop debugging skills, he translates complex silicon requirements into robust testcases and measurable coverage closure. A Bachelor of Technology in Electrical and Electronics Engineering from Model Engineering College, Thrikkakkara, he blends academic grounding with hands-on delivery in large-scale verification projects. Based in Kerala, India, Jeffrin pairs pragmatic engineering with ongoing curiosity about chiplet interconnects and verification automation.
15 years of coding experience
Bachelor of Technology, Electrical and Electronics Engineering, Bachelor of Technology, Electrical and Electronics Engineering at Model Engineering College,Thrikkakkara
Github Skills (25)
kernel9
python8
automation8
moto8
samsung7
samsung-galaxy6
linux-kernel5
galaxy4
zen4
react4
wsl23
lollipop3
linux3
windows3
mixer3
Programming languages (3)
Github contributions (5)
ahiliation/beautifulwork
Jan 2015 - May 2015
Contributions:166 pushes in 4 months
ahiliation/KERNEL
Dec 2015 - Jan 2020
Contributions:22 pushes, 1 branch in 4 years 1 month
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