Jeremy Bruestle
Chief Scientific Officer at Spiral Genetics
Seattle, Washington, United States
Summary
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RockstarJeremy Bruestle is a seasoned technology leader and scientist with 14 years of experience building and scaling systems at the intersection of cryptography, machine learning, and genomics. As Chief Scientific Officer at Risc0 and cofounder/board member of Spiral Genetics, he combines hands-on engineering with strategic product direction to deliver verifiable computing and genomics solutions. His background includes principal engineering and architect roles at Intel, Fabric Genomics, and earlier startups, reflecting deep expertise in back-end systems, code generation, and build tooling. Jeremy is an active open-source contributor to notable projects such as RISC Zero (zk-STARKs on RISC-V) and PlaidML, where he implemented core verification, code-id generation, and tile codegen fixes. He excels at translating research-grade ideas into robust production code and buildable tooling, often focusing on correctness, reproducible proofs, and efficient caching. Based in Seattle, he brings a founder’s mindset coupled with enterprise-grade engineering discipline.
14 years of coding experience
19 years of employment as a software developer
Github Skills (15)
risc-v10
proofs10
code-generation10
c-language10
rust10
proof10
virtual-machine10
starknet10
cprogramming-language10
cryptography10
data-structure9
data-structures9
caching8
elf7
build-system7
Programming languages (6)
Github contributions (5)
plaidml/plaidml
Sep 2018 - Jun 2021
PlaidML is a framework for making deep learning work everywhere.
Role in this project:
Back-end Developer
Back-end DeveloperContributions:285 reviews, 254 commits, 74 PRs in 2 years 9 months
Contributions summary:Jeremy primarily focused on bug fixes related to build processes and contributed to core functionality within the `tile/codegen` directory. Their work involved modifying files related to code generation, access patterns, and caching. The user addressed build breaks and implemented code changes for improved data structure support and caching calculations within the codebase.
deep-learningplaidml
risc0/risc0
Feb 2022 - Dec 2022
RISC Zero is a zero-knowledge verifiable general computing platform based on zk-STARKs and the RISC-V microarchitecture.
Role in this project:Back-end Developer
Back-end DeveloperContributions:180 reviews, 20 commits, 79 PRs in 10 months
Contributions summary:Jeremy primarily contributed to the core functionality of the RISC Zero project, focusing on building a zero-knowledge verifiable general computing platform. Their commits demonstrate the implementation and modification of code related to code verification and code ID generation. They worked on components such as `code_id.cpp`, `proof.cpp`, `verify.cpp` and other supporting files to ensure correct code verification and proof generation. The user also addressed testing and build processes to incorporate changes.
microarchitectureriscrisc-vstarkzero-knowledge
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