Jiabin Wu
Student at ShanghaiTech University
Shanghai, China
Summary
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RockstarJiabin Wu is a chip design and verification student based in Shanghai with four years of hands-on experience in the semiconductor domain. He blends practical engineering skills with a strong learning mindset, focusing on translating circuit-level requirements into verifiable designs. Though early in his career, he has built domain expertise that bridges RTL design, verification methodologies, and tooling commonly used in chip development. Jiabin’s GitHub presence signals a specialization in hardware-focused projects, suggesting comfort with both code and hardware description languages. He is poised to contribute effectively to ASIC/FPGA teams and grow into roles that require rigorous verification and cross-disciplinary collaboration.
4 years of coding experience
Github Skills (16)
ieee10
cpu10
risc-v10
risc10
high-performance10
microarchitecture10
computer-engineering10
electrical-engineering10
computer-architecture10
chisel10
simulation-framework9
simulation9
co-simulation9
parallel-computing8
blocking6
Programming languages (6)
Github contributions (5)
rezado/cpu_design
Oct 2021 - Sep 2022
Contributions:7 commits, 2 pushes in 11 months
rezado/single
Sep 2021 - Mar 2022
Contributions:9 commits, 5 pushes, 2 branches in 6 months
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