Summary
Jiahui Wang is a Compute Subsystem Verification Engineer with eight years of experience in functional verification and RF/analog front-end testing at Qualcomm, now focused on compute subsystem verification. With a MASc in Computer Engineering from the University of Toronto (3.9 GPA) and a BSc with distinction from the University of Alberta, she blends strong academic rigor with practical DV workflow improvements. Her work has spanned designing test sequences, waveform analysis to root-cause analog/RF bugs, and modeling analog modules, plus building side projects that boosted verification efficiency. Based in Old Toronto, she brings a hands-on engineering style that pairs low-level signal understanding with system-level verification strategy, making her adept at uncovering subtle hardware-software integration issues.
8 years of coding experience
3 years of employment as a software developer
Master of Applied Science - MASc, Computer Engineering, 3.9, Master of Applied Science - MASc, Computer Engineering, 3.9 at 加拿大多伦多大学
Bachelor of Science - BSc, Computer Engineering with Distinction, 3.7, Bachelor of Science - BSc, Computer Engineering with Distinction, 3.7 at 加拿大阿尔伯塔大学
Chinese, English