Jianan Yang

Memory Design Technical Manager at TSMC

Austin, Texas, United States
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Summary

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Senior
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Jianan Yang is a Memory Design Technical Manager at TSMC with over 20 years of semiconductor experience spanning device engineering, circuit design, mixed-signal systems, and memory compiler architecture. He has led SRAM/ROM architecture and circuit development, hands-on silicon debugging and yield improvement, and applied low-power and high-speed techniques across products including MIPI PHYs for image sensors. Skilled in Cadence and SPICE toolflows, parasitic-aware layout collaboration, and characterization/liberty view generation, he bridges device, process, and SOC design flows to optimize power, performance, and density. Jianan’s background combines deep academic training (MSEE and PhD from Purdue) with practical process integration work from Motorola to modern advanced-node memory design, giving him rare end-to-end insight from transistor physics to production silicon. Notably, he balances rigorous technical communication and scripting-driven automation with a creative, keyboard-first approach suggested by his playful GitHub tagline.
code10 years of coding experience
job21 years of employment as a software developer
bookBachelor's degree, Physics, Bachelor's degree, Physics at Peking University
bookMSEE, Electrical Engineering, MSEE, Electrical Engineering at Purdue University
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Stats
1reputation
236reached
0answers
1question
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Github Skills (172)

mirroring10
encrypt10
prefix10
watermark10
screen10
floating10
replay10
x-library10
charset10
permission10
acl10
recording10
toast10
retrofit10
thread-pool10

Programming languages (12)

TypeScriptJavaShellCSSCVueJavaScriptGo

Github contributions (5)

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yangxiaoge/tvbox_cust

Mar 2024 - Mar 2025

Contributions:7 releases, 149 pushes, 17 branches in 1 year
yangxiaoge/MumuXi

Jun 2016 - Sep 2019

Contributions:33 commits, 35 pushes, 1 branch in 3 years 3 months
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Jianan Yang - Memory Design Technical Manager at TSMC