Summary
Jianan Yang is a Memory Design Technical Manager at TSMC with over 20 years of semiconductor experience spanning device engineering, circuit design, mixed-signal systems, and memory compiler architecture. He has led SRAM/ROM architecture and circuit development, hands-on silicon debugging and yield improvement, and applied low-power and high-speed techniques across products including MIPI PHYs for image sensors. Skilled in Cadence and SPICE toolflows, parasitic-aware layout collaboration, and characterization/liberty view generation, he bridges device, process, and SOC design flows to optimize power, performance, and density. Jianan’s background combines deep academic training (MSEE and PhD from Purdue) with practical process integration work from Motorola to modern advanced-node memory design, giving him rare end-to-end insight from transistor physics to production silicon. Notably, he balances rigorous technical communication and scripting-driven automation with a creative, keyboard-first approach suggested by his playful GitHub tagline.
10 years of coding experience
21 years of employment as a software developer
Bachelor's degree, Physics, Bachelor's degree, Physics at Peking University
MSEE, Electrical Engineering, MSEE, Electrical Engineering at Purdue University