Summary
Jie Zhang is an assistant professor and computer architect specializing in storage systems and specialized processors for big data and AI workloads, with four years of post-PhD research and academic experience. His work focuses on overcoming data-movement bottlenecks and the memory wall of the Von Neumann model, producing over 30 publications—18 as first author—across ISCA, OSDI, HPCA, MICRO, FAST and other top venues. Trained at Yonsei, KAIST, UTD and Nanjing University, he combines rigorous circuit-and-system foundations with system-level storage design, informed by a postdoc at KAIST. Based in Shanghai, he brings a rare blend of hardware-aware architecture thinking and systems-level practicality, often targeting real-world performance limits rather than incremental optimizations.
4 years of coding experience
Bachelor of Science (BS), Telecommunications Engineering, 3.48, Bachelor of Science (BS), Telecommunications Engineering, 3.48 at Nanjing University of Posts and Telecommunications
Master of Science (M.S.), circuit and system, 3.8, Master of Science (M.S.), circuit and system, 3.8 at UTD
Doctor of Philosophy - PhD, ENGINEERING, Doctor of Philosophy - PhD, ENGINEERING at Yonsei University
Postdoctoral Researcher, Computer Science, Postdoctoral Researcher, Computer Science at Korea Advanced Institute of Science and Technology
English