Jielun Tan
GPU AI Compute Architect at AMD
Mountain View, California, United States
Summary
🤩
Rockstar🎓
Top SchoolJielun Tan is a GPU AI compute architect with nine years of hands-on experience optimizing hardware and firmware for high-performance compute across industry leaders in Mountain View. He has driven AI and CPU performance work at Cerebras, Qualcomm, and now AMD, blending deep system-level modeling with FPGA and cache design expertise developed during internships and graduate research at the University of Michigan. Jielun’s background spans RTL design, cache architecture, and performance modeling, with practical experience refining accelerator interfaces and verification flows using Chisel and Diplomacy concepts. Known for translating academic rigor into production-grade performance wins, he brings a pragmatic focus on measurable throughput and latency improvements across AI accelerators and CPUs. An engineer who moves smoothly between silicon, firmware, and system benchmarks, he pairs low-level hardware insight with an eye for real-world deployment constraints.
9 years of coding experience
7 years of employment as a software developer
Master of Science - MS Computer Engineering, Master of Science - MS Computer Engineering at University of MichiganBoston Latin School
English, Chinese, French, Latin, Spanish
Github Skills (9)
chisel10
rocket-chip10
scala10
rocket9
risc7
verification7
risc-v5
dcache3
superscalar2
Programming languages (3)
Github contributions (5)
jieltan/deep-learning-course
Feb 2019 - Apr 2019
Contributions:43 pushes in 2 months
jieltan/project-v-open
Mar 2020 - Nov 2020
Contributions:9 commits, 1 push, 5 branches in 8 months
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