Jiemin Zhou
Senior ISP Algorithm Engineer at Axera Japan
Tokyo, Japan
Summary
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Senior🎓
Top SchoolJiemin Zhou is a Senior ISP Algorithm Engineer based in Tokyo with a decade of experience designing camera ISP pipelines, computational photography features, and hardware-friendly RTL/C implementations. He has driven prototype algorithm development, IQ benchmarking, and verification workflows at Axera Japan and DJI, contributing to multiple pending patents and cross-functional AI-HW integrations for next-generation ISP chips and drone products. Earlier work at Canon combined RTL design, OpenCL implementations on GPU/FPGA, and driver/firmware development, giving him a rare full-stack perspective from algorithm to silicon. Known as a quick learner and collaborative problem-solver, Jiemin blends deep theoretical knowledge with practical C/Python prototypes and hands-on verification to shorten time-to-hardware for complex imaging features.
10 years of coding experience
8 years of employment as a software developer
Master's Degree, Electrical and Electronics Engineering, Master's Degree, Electrical and Electronics Engineering at Waseda UniversityBachelor's Degree, Electrical, Electronics and Communications Engineering, 3.3/4, Bachelor's Degree, Electrical, Electronics and Communications Engineering, 3.3/4 at Fudan University
English, Japanese, ChineseGithub contributions (5)
ZHOUJiemin/Async-Fifo-RTL
Sep 2015 - Dec 2015
Contributions:44 commits, 32 PRs, 22 pushes in 3 months
fifoasync
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