Jin-siang Lin
Staff Research And Development Engineer at 新思科技
Hsinchu City, Taiwan, Taiwan
Summary
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Senior🎓
Top SchoolJin-siang Lin is a Staff R&D Engineer at Synopsys with nine years of experience bridging deep learning research and production software, currently focused on enhancing the Verdi debugging tool. With an EE master's and a CS bachelor's from National Tsing Hua University, he blends academic strengths in reinforcement learning and medical imaging with industry work on GPU software and ML deployment for smart manufacturing. He progressed from graduate research under Prof. Min Sun to machine learning and GPU engineering roles at Qualcomm and MediaTek, demonstrating fluency across research, model-to-production pipelines, and embedded/accelerated systems. Colleagues rely on him for translating cutting-edge DL ideas into robust tooling for large-scale EDA workflows — a less obvious strength is his knack for making research-grade algorithms practical in strict performance and integration constraints.
9 years of coding experience
4 years of employment as a software developer
Master's degree EE, Master's degree EE at National Tsing Hua UniversityProgramming languages (3)
Github contributions (5)
ss80226/Jin-Siang-Lin
May 2020 - Aug 2024
Contributions:19 pushes, 1 branch in 4 years 4 months
ss80226/MAP_estimation
May 2020 - Apr 2022
Contributions:4 commits, 3 pushes, 1 branch in 1 year 11 months
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