Summary
Jinsung Youn is a Chip Package SI/PI Engineer with over 10 years of experience in high-speed SerDes design, package and board signal/power integrity, and 3D IC package modeling for CoWoS and SoIC platforms. He has led SI/PI verification and co-optimization across industry leaders including Google, AMD, HPE, and Samsung, translating system-level constraints into validated silicon and lab-tested designs. His work spans front-end circuit equalizers to multi-physics silicon photonics and advanced PDN decoupling techniques (DTC, IPD), with a knack for developing in-house verification tools and enhancing EDA capabilities through vendor collaboration. Based in Seoul and holding combined MS/PhD training from Yonsei University, he combines deep academic rigor with practical product sign-off experience on cutting-edge chiplet and silicon photonics systems. An understated strength is his interdisciplinary fluency—bridging analog front-end design, package modeling, and statistical/thermal-aware simulation to accelerate NPI and production readiness.
10 years of coding experience
8 years of employment as a software developer
Combined Master of Science (M.S.) and Doctor of Philosophy (Ph.D.) Electrical and Electronic Engineering, Combined Master of Science (M.S.) and Doctor of Philosophy (Ph.D.) Electrical and Electronic Engineering at Yonsei University