Johannes Walter is an FPGA team lead based in Chicago with 11 years of hands-on experience designing and verifying complex FPGA systems for high-reliability and high-performance applications. He has led hardware-software co-design efforts from concept to mass production, including multi-band GNSS receivers at Swift Navigation and trading-grade FPGA systems at Headlands Technologies. His work spans radiation-tolerant designs for CERN, high-speed RF and AXI4 interfaces for NI’s USRP, and embedded ARM firmware integration on Xilinx Zynq platforms, showing deep expertise across Verilog/VHDL, SystemVerilog/UVM, and C/C++. Johannes combines technical leadership with practical delivery—mentoring teams, managing release cycles, and collaborating closely with PCB and firmware teams to ship products. Notably, he brings uncommon domain breadth: experience in both scientific accelerator environments and commercial trading/GNSS products, which informs robust, production-focused design decisions.
11 years of coding experience
8 years of employment as a software developer
Bachelor of Science in Engineering, Hardware Software Design, Bachelor of Science in Engineering, Hardware Software Design at University of Applied Sciences Upper Austria - Hagenberg Campus
Contributions:564 pushes, 4 branches in 9 years 11 months
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