Jon Stephan
Principal Architect at SiFive
Harlingen, Texas, United States
Summary
👤
Senior🎓
Top SchoolJon Stephan is a Principal Architect with deep expertise in semiconductor product quality, reliability, and soft error rate (SER) modeling, bringing over 18 years of experience at Intel and now applying that domain knowledge at SiFive. He has led system-level fault injection and beam-testing programs for Xeon, Itanium and other families, developed novel SER testing methodologies, and originated hardware test chips and lab automation to quantify failure mechanisms. Known for bridging hands-on lab work with statistical modeling, he drives practical reliability solutions that inform product architecture and guardband optimization. Based in Harlingen, Texas, Jon pairs a Microelectronic Engineering degree from RIT with a rare blend of experimental rigor and system-level analysis that helps teams anticipate field failure modes before silicon ships.
13 years of coding experience
21 years of employment as a software developer
Bachelor of Science (B.S.), Microelectronic Engineering, Bachelor of Science (B.S.), Microelectronic Engineering at Rochester Institute of Technology
Github Skills (5)
occupancy-grid-map8
rviz7
robotics6
ros6
cygwin1
Programming languages (2)
Github contributions (5)
jfstepha/my-pi-thermostat
Jun 2015 - Sep 2023
Contributions:51 pushes, 1 issue in 8 years 4 months
josephduchesne/differential-drive
Sep 2012 - Dec 2012
Contributions:13 commits in 3 months
roboticsrotary-encodersros2differential-driverotary
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