Jordan Penard is a Staff Design Engineer based in London with 10 years' experience designing and validating complex SoCs and IP for AI accelerators and advanced-node silicon. He has led DFT architecture and implementation for large SoCs (16nm/28nm), built RTL/IP, developed FPGA validation platforms, and created automation and web-based tools (Python/Django, PHP/MySQL) to streamline verification, physical design monitoring, and RAM macro generation. Comfortable across the RTL-to-silicon flow, Jordan blends hands-on ATPG/DFT expertise with scripting, synthesis/TCL flow development, and occasional DevOps to keep CI/CD and validation pipelines running. He pairs methodical engineering leadership—managing multi-engineer teams and ATE bring-up—with a tinkerer’s curiosity evident in personal projects spanning electronics, 3D printing and photography. Notably, he has applied IEEE 1687/IJTAG and hierarchical MBIST strategies to enable scalable test insertion and pattern retargeting on very large designs.
10 years of coding experience
8 years of employment as a software developer
Engineer degree (University), Electronics and Computer Science in apprenticeship, Engineer degree (University), Electronics and Computer Science in apprenticeship at ESISAR Grenoble INP
2-years technical degree (University), Electronics in apprenticeship, 2-years technical degree (University), Electronics in apprenticeship at IUT1 de Grenoble
French high-school, Electronics, Mention, French high-school, Electronics, Mention at Jules Algoud à Valence
Contributions:16 pushes, 1 branch in 1 year 4 months
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