Jordan Pui
R&D Engineer, Staff at 合见工软
Shanghai, Shanghai, China
Summary
👤
Senior🎓
Top SchoolJordan Pui is a Staff R&D engineer and physical-design specialist with 11 years of experience bridging academic research and industrial EDA delivery, holding a Ph.D. from CUHK and a B.Sc. from SJTU. He has been an architect and major contributor to state-of-the-art placement and routing tools, with industry-verified features across logic synthesis, partitioning, and routing. His work has earned multiple awards and patents, and his research has attracted over 500 citations while his GitHub projects have garnered notable community recognition. At companies from Cadence and Synopsys to Huawei and his current role leading partition/localization in Shanghai, he has driven timing-driven localization, die-level partitioning, and AI-driven macro placement. Less obvious: he blends deep algorithmic research with production-grade engineering—often translating contest-grade SOTA ideas into scalable tools verified on industry-level designs.
11 years of coding experience
3 years of employment as a software developer
Bachelor of Science (B.Sc.), Computer Science, Bachelor of Science (B.Sc.), Computer Science at Shanghai Jiao Tong UniversityHigh School Diploma, High School Diploma at Guangzhou Zhixin High SchoolThe Chinese University of Hong Kong (CUHK)
English, Chinese, Chinese
Stackoverflow
1reputation
0reached
0answers
0questions
Github Skills (20)
physical-design10
placement10
eda10
vlsi9
vpn9
vlsi-physical-design9
proxy9
fpga9
height8
trojan8
android8
v2ray8
xray8
algorithm8
linear-algebra5
Programming languages (3)
Github contributions (5)
cuhk-eda/ripple-fpga
Mar 2019 - Feb 2020
RippleFPGA, A Simultaneous Pack-and-Place Algorithm for UltraScale FPGA
Contributions:1 release, 12 commits, 1 PR in 10 months
fpgaphysical-designedaplacementultrascale
jordanpui/jordanpui.github.io
Mar 2018 - Dec 2023
Contributions:25 pushes, 1 branch in 5 years 9 months
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