Jose Renau
California, United States
Summary
👤
Senior🎓
Top SchoolJose Renau is a Professor at UC Santa Cruz with over 20 years in academia and a decade of focused professional experience applying computer architecture and AI to real-world chip design. He leads research on AI agents for chip design while concurrently founding and running UNCORE LLC, bridging cutting-edge research with commercial engineering. His consulting work with companies like Huawei, Imagination Technologies, and Esperanto reflects deep expertise in memory subsystems, core microarchitecture, and high-performance simulation infrastructure. Trained with a PhD in Computer Science from UIUC, he combines rigorous academic methods with hands-on system-building—an uncommon blend that accelerates both silicon verification and architectural exploration. Based in California, he is known for producing practical performance models and novel predictors that have influenced both industry verification flows and research toolchains.
10 years of coding experience
14 years of employment as a software developer
MS, Computer Science, MS, Computer Science at Universitat Ramon LlullPhD, Computer Science, PhD, Computer Science at University of Illinois Urbana-ChampaignUniversity of California Santa Cruz
Github Skills (103)
verilog10
simulator10
synthesis10
asic10
co-simulation10
emulation10
multicore10
vlsi-physical-design10
fpga10
risc-v10
sta10
simulation10
vlsi10
hardware10
parse10
Programming languages (11)
Github contributions (5)
masc-ucsc/hhds
Apr 2023 - Jul 2026
Hardware Hierarchical Dynamic Structures
Contributions:8 reviews, 112 PRs, 212 pushes in 3 years 3 months
hardware
masc-ucsc/cmpe220fall16
Sep 2016 - Oct 2017
Public repository of the UCSC CMPE220 class project
Contributions:78 commits, 61 pushes, 1 branch in 1 year
class-projectpublic-repositoryucsc
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