Joseph Chen is a seasoned power electronics and embedded systems engineer with over three decades of hardware design experience and 11 years of professional experience in sales and customer-facing technical roles. He progressed from designing high-power test equipment and IGBT/GTO systems to leading applications and FAE teams at multinational firms, winning key designs for Li-ion chargers, digital power POLs, and remote radio head power solutions. Based in Xi'an, he combines deep analog and power-design expertise with strong analytical, debugging and communication skills, routinely supporting major accounts like Huawei, ZTE and Cisco. More recently he has contributed low-level kernel and trusted-execution work for Rockchip platforms and OP-TEE, adding PSCI support, CPU power management and platform initialization—an uncommon blend of power-hardware acumen and kernel/TEE engineering. Comfortable leading national projects and remote offices, he translates complex product requirements into manufacturable designs and hands-on prototypes. Colleagues describe him as a pragmatic problem-solver who pairs domain depth with practical customer-driven delivery.
11 years of coding experience
12 years of employment as a software developer
Master's degree, Power Electronics, Master's degree, Power Electronics at Xi'an University of Technology
Contributions summary:Joseph's contributions primarily revolve around implementing Power State Controller (PSCI) support within the Rockchip Linux kernel. Their work includes adding PSCI support for both arch32 and arch64 architectures, integrating it into the device tree for specific boards, and supporting arch32 PSCI suspend functionality. They also added code related to a fiq debugger within the kernel.
Contributions summary:Joseph primarily contributes to the `op-tee/optee_os` repository by implementing and extending support for Rockchip platforms. Their work includes adding support for the RK322x platform, which involves initializing various hardware components like GIC and SMP CPU boot up, and implementing PSCI (Power State Coordination Interface) features, including CPU on/off, system suspend, and system reset. Furthermore, the user has contributed to improve system performance by implementing udelay function and added features such as clock gating and PLL control.
trustedtee
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