Josh Huang is a hardware-focused manager and digital design engineer with 8+ years of experience leading SoC and ISP IP development across companies like ASPEED, Bitmain, Ubiquiti and MStar. He combines deep RTL/verification expertise (SystemVerilog/UVM, Verilog, DV flows) with automation and scripting skills (Perl/Python/Tcl/Shell) to accelerate design-to-tapeout cycles and produce reusable IP generators and SRAM wrappers. Josh has contributed to 34+ chips spanning process nodes from 180nm to 28nm, shipping mass-production ASICs and building FPGA verification platforms, and he’s comfortable bridging algo-to-RTL work for imaging pipelines (LSC/LDAC/3A). Known for pragmatic tooling—automated env/template generators and regression systems—he brings both hands-on debug experience (JTAG, oscilloscope, logic analyzers) and cross-team production problem solving. Fluent in English with strong academic grounding in computer science, he also has a background in HDR video tone-mapping research that informs his ISP work.
8 years of coding experience
15 years of employment as a software developer
Bachelor's degree Computer Science, Bachelor's degree Computer Science at National Chiao Tung University
Master's degree Computer Science, Master's degree Computer Science at National Tsing Hua University
A JavaScript / Python / PHP cryptocurrency trading library with support for more than 100 bitcoin/altcoin exchanges
Contributions:3 pushes, 3 branches in 4 months
exchangepythonjavascriptphpexchanges
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