Summary
Junting Chen is an electrical design engineer with 8 years of experience blending analog and digital VLSI, FPGA implementation, and biomedical MEMS work to deliver low-power, high-performance hardware systems. Currently at KLA, Junting brings hands-on expertise in Cadence Virtuoso layout, Verilog-based digital design, and FPGA porting, combined with practical power electronics experience from designing a cost-optimized, high-efficiency DC-DC module. Their research-driven background includes neuromorphic analog VLSI on FPAA platforms and COMSOL-modeled MEMS sensors for Parkinson’s detection and CAR-T therapy, revealing a rare cross-disciplinary fluency between computational neuroscience and device fabrication. Comfortable moving from schematic to silicon, they also have teaching and embedded systems experience with NVIDIA Jetson and time-synchronization techniques. Known for pairing rigorous simulation with pragmatic prototyping, Junting is motivated by next-gen electronics and translational biomedical applications.
9 years of coding experience
1 year of employment as a software developer
Master of Science - MS, Electrical and Computer Engineering, 3.75, Master of Science - MS, Electrical and Computer Engineering, 3.75 at Georgia Institute of Technology
Bachelor of Science - BS, electrical engineering, 3.7, Bachelor of Science - BS, electrical engineering, 3.7 at Rensselaer Polytechnic Institute