Jyun-neng Ji
CPU Design Engineer at Google
Taichung, Taiwan
Summary
👤
Senior🎓
Top SchoolJyun-neng Ji is a CPU design engineer with nine years of experience specializing in digital IC and video codec architectures, currently at Google after contributing to MediaTek’s video decoder IP. He has deep expertise in lowering DRAM bandwidth through architecture and cache design, improving power-performance-area tradeoffs, resolving timing issues, and automating flows such as lint and SRAM wrapper generation. His background includes hands-on FPGA and ZYNQ SoC teaching, translating to strong practical skills in hardware-software integration and mentoring. Based in Taichung, Taiwan, he holds an M.S. in VLSI design and a B.S. in electrical engineering, and is known for combining rigorous academic training with production-focused engineering that accelerates multimedia silicon development.
9 years of coding experience
2 years of employment as a software developer
Master of Science (M.S.), Electrical Engineering (VLSI Design), Master of Science (M.S.), Electrical Engineering (VLSI Design) at National Cheng Kung UniversityBachelor of Science (B.S.), Electrical Engineering, GPA 3.7/4.0, Bachelor of Science (B.S.), Electrical Engineering, GPA 3.7/4.0 at National Changhua University of Education
English, Chinese
Stackoverflow
23reputation
259reached
0answers
3questions
Github Skills (48)
crypto10
approximate10
evaluation10
cryptanalysis10
bootstrapping10
fhe10
packing10
valgrind10
linked-list10
mocking10
scheme10
privacy-enhancing-technologies10
encryption10
homomorphic-encryption10
testing9
Programming languages (4)
Github contributions (5)
ncku-vlsilab/2018_FPGA_Design
Aug 2018 - Jul 2019
FPGA Design lab
Contributions:67 PRs, 105 pushes, 1 branch in 11 months
xilinxsystem-on-chipplacementlatticeaccelerators
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