Kaleb Barrett

FPGA Verification Engineer

Boulder, Colorado, United States
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Summary

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Kaleb Barrett is an FPGA verification engineer with nine years of hands-on experience designing, verifying, and modeling high-performance FPGA systems for aerospace and trading platforms. Based in Boulder, he combines deep VHDL design expertise and cocotb-based verification—where he is a long-time maintainer and contributor—with practical C/C++ bare-metal and automation tooling used in hardware bring-up. He has driven verification strategy at Raytheon and Mercury Systems and now applies that expertise to low-latency trading hardware at Hudson River Trading. Kaleb’s open-source work includes improving core algorithms in more-itertools and strengthening test coverage and APIs in cocotb, reflecting a blend of rigorous testing discipline and algorithmic attention to detail. Colleagues rely on him for bridging model-accurate software simulations with reproducible hardware tests, and he’s known for teaching verification practices to cross-functional teams.
code9 years of coding experience
job9 years of employment as a software developer
bookBSEE Computer Engineering, BSEE Computer Engineering at Temple University
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Stackoverflow

Stats
1,527reputation
64kreached
40answers
27questions
Badges
lua
top-5%
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Github Skills (18)

python10
testing10
verification10
itertools10
test-automation10
data-structure9
algorithm9
verilog9
algorithms9
vhdl9
lua9
data-structures9
unit-test8
unit-testing8
roblox6

Programming languages (13)

C#C++CRustVueHTMLTypeScriptVHDL

Github contributions (5)

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cocotb/cocotb

May 2019 - Sep 2022

cocotb: Python-based chip (RTL) verification
Role in this project:
userQA Engineer / Test Automation Engineer
Contributions:1731 reviews, 445 commits, 1381 PRs in 3 years 4 months
Contributions summary:Kaleb contributed extensively to the testing and verification of the cocotb library. They added new test cases and updated existing ones to improve coverage and robustness. Their work involved fixing bugs, incorporating new features, and ensuring the correct functionality of the core library components, with a focus on ensuring testability with the standard-based APIs. The changes demonstrate a good understanding of testing methodologies and how to integrate them into this specific verification framework.
uvmpythonvhdlcosimulationcoroutine
More routines for operating on iterables, beyond itertools
Role in this project:
userBackend Developer
Contributions:5 commits, 1 PR, 3 comments in 2 days
Contributions summary:Kaleb focused on implementing and refining the `set_partitions` and `integer_partitions` functions within the `more_itertools` library. Their work involved modifications to the core logic of these functions, addressing code style issues, and incorporating unit tests to ensure correctness. The user also addressed some typos within the codebase. These changes contribute to the library's functionality for working with iterables.
itertoolsoperatingroutinesiterablesbeyond
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Kaleb Barrett - FPGA Verification Engineer