Summary
Kang Zhao is a professor and seasoned EDA/VLSI expert with over a decade of experience bridging academia and industry, currently leading research and hiring at Beijing University of Posts and Telecommunications. His career spans roles at Tsinghua, Intel Labs, Xilinx/AMD and BUPT where he built and managed teams working on synthesis, physical layout, LLVM-based HLS, compiler optimizations and hardware/software co-emulation. He combines deep RTL/Verilog skills with systems-level work in virtual platforms, embedded architecture and post-silicon validation, and has applied robotics and SLAM/vision techniques in research settings. Unusually for a professor, he has extensive product and tool development experience in commercial EDA groups, shipping algorithms and tooling for FPGA flows. He holds a PhD from Tsinghua and is active in cross-institution collaborations between academia and industry.
10 years of coding experience
13 years of employment as a software developer
Bechelor, computer science & technlogy, Bechelor, computer science & technlogy at Xidian University
Doctor of Philosophy (Ph.D.), EDA, VLSI, Computer Science and Technology, Doctor of Philosophy (Ph.D.), EDA, VLSI, Computer Science and Technology at Tsinghua University
English, Chinese