Kashyap Kansara is a Principal Engineer in silicon design with over 11 years of experience leading ASIC physical design for advanced nodes from 16nm to 130nm. He has driven complete place-and-route flows, power-structure architecture, CTS, sign-off STA, and physical verification using Synopsys, Cadence and Mentor toolchains on complex networking and mobile SoCs. At Broadcom and now Microsoft he led cross-functional teams and flow enhancements that enabled successful 16nm tapeouts and robust power-grid and IR-drop analyses. Known for combining hands-on PNR and timing optimization with client-facing pre-sales and business-development responsibilities, he bridges technical delivery and stakeholder engagement. He also brings uncommon depth in CPF-based low-power domain implementation and die-size/power planning for large multi-domain chips. Based in Bengaluru, he pairs deep silicon implementation expertise with proven leadership across enterprise and services environments.
11 years of coding experience
16 years of employment as a software developer
BE, Electronics & Communication, BE, Electronics & Communication at Vishwakarma Government Engineering College
High School, Science, High School, Science at Kameshwar High School
Contributions:13 pushes, 1 branch in 1 year 9 months
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Kashyap Kansara - Principal Engineer Silicon Design at Microsoft