Katharina Ceesay-seitz

Doctoral Student at ETH Zürich

Zurich, Zurich, Switzerland
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Summary

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Katharina Ceesay-seitz is an embedded systems specialist and doctoral researcher at ETH Zürich with nine years of experience developing safety-critical firmware, formal verification flows, and hardware security research. She has a strong track record from industry to research—building Radiation Monitoring Electronics at CERN, contributing to functional safety for automotive ECUs, and spending a research stint at Apple on formal verification. Her expertise spans low-level C and assembly for constrained devices, SystemVerilog/UVM and formal assertions for digital verification, and Python tooling for robust testing and automation. Awarded for her Master's thesis at TU Wien, she combines rigorous academic training with practical product-focused engineering and compliance to IEC 61508. Colleagues rely on her ability to bridge hardware and software domains to produce auditable, safety-certified systems, and she brings the uncommon perspective of hands-on FPGA/VHDL work alongside security research.
code9 years of coding experience
job9 years of employment as a software developer
bookVienna University of Technology
bookMatura, EDV und Organisation, Pass with distinction, Matura, EDV und Organisation, Pass with distinction at HTL Wiener Neustadt
languagesEnglish, Spanish, German, French, mandinka
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Github Skills (34)

32-bit10
risc-v10
hardware10
vcd10
verilog9
parser9
cpu9
asic9
fpga9
yosys8
systemverilog7
chisel7
linux7
systemverilog-hdl7
command-line7

Programming languages (13)

C++RustCScalaTypeScriptSystemVerilogVHDLSail

Github contributions (5)

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KatCe/ibex

May 2023 - Jan 2025

Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.
Contributions:6 pushes, 2 branches in 1 year 8 months
comsec-group/mucfi

Sep 2024 - Feb 2026

Microarchitectural control flow integrity (𝜇CFI) verification checks whether there exists a control or data flow from instruction's operands to the program counter.
Contributions:17 pushes, 2 comments, 1 issue in 1 year 4 months
control-flowdesignformalhardwaresecurity
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Katharina Ceesay-seitz - Doctoral Student at ETH Zürich