Keith Rothman
Software Engineer at Muon Space
Sydney, New South Wales, Australia
Summary
🤩
Rockstar🎓
Top SchoolKeith Rothman is a software engineer with 10 years' experience building backend systems for aerospace and FPGA toolchains, currently applying his skills at Muon Space in Sydney. He previously spent seven years at Google and began his career in flight software, giving him a strong foundation in safety-critical and high-reliability engineering. An active open-source contributor, Keith has improved parsing, error reporting, and architecture checks in prominent projects like Yosys and nextpnr and contributed to widely used tooling such as RapidYAML and Cap’n Proto Python bindings. His work often bridges low-level parsing, performance-sensitive algorithms, and build/CI automation, demonstrating both systems-level rigor and practical developer ergonomics. Notably, he has helped document and automate FPGA bitstream and routing workflows (prjxray, VTR), showing a deep interest in hardware-software integration. He holds an MS in Aerospace Engineering from Cal Poly and brings a methodical, cross-disciplinary approach to complex engineering problems.
10 years of coding experience
13 years of employment as a software developer
California Polytechnic State University, San Luis Obispo
Github Skills (40)
algorithms10
verilog10
c-language10
xilinx10
python10
yosys10
routing-slip10
data-serialization10
cmake10
serialization10
routes10
bitstream10
cython10
build-automation10
yaml10
Programming languages (14)
Github contributions (5)
f4pga/prjxray
Sep 2018 - Apr 2021
Documenting the Xilinx 7-series bit-stream format.
Role in this project:
Backend Developer & Automation Engineer
Backend Developer & Automation EngineerContributions:105 reviews, 775 commits, 518 PRs in 2 years 7 months
Contributions summary:Keith's commits are focused on generating tile types, site types, and tilegrid information for the Xilinx 7-series bit-stream format. They have made changes to a Python script, suggesting they are involved in data processing or scripting within the project. The user implemented and debugged code that interacted with the f4pga/prjxray repository, specifically writing and generating key database structure features.
vivadoartix7xilinxsymbiflowxilinx-fpga
YosysHQ/nextpnr
Jan 2021 - Apr 2021
nextpnr portable FPGA place and route tool
Role in this project:Back-end Developer
Back-end DeveloperContributions:157 reviews, 165 commits, 55 PRs in 2 months
Contributions summary:Keith's commits primarily focus on implementing and improving the "archcheck" feature within the "nextpnr" FPGA place and route tool. Their contributions added comprehensive connectivity checks, including round-trip validation and optimization of the algorithm. These efforts involved modifying core files related to the archcheck functions, which likely involved backend and/or system level architectural work. Furthermore, the user refactored code and made improvements to performance, especially with respect to using the PIP check loop.
placenextpnrplace-and-routexilinxhaiku
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