Summary
Kevin Duffus is a Principal Silicon Test and Data Infrastructure Engineer with 16 years of experience designing, debugging, and scaling test systems for semiconductor products across Microsoft, NVIDIA, Micron, and Aptina. He blends deep electrical and layout expertise with software-driven analytics—using Python, R, SKILL, and custom web platforms—to accelerate failure diagnosis, yield improvement, and wafer-level triage. Kevin has led cross-functional, multinational programs developing large-die characterization, cryogenic electronics testing, and automated pixel-array generation while driving measurable yield and coverage gains. He built distributed processing environments and rapid outlier-identification tools that turned day-long analyses into hour-scale insights, and authored methods showcased at ITC. Based in Oakland, he pairs hands-on circuit and schematic design with data infrastructure deployment, making him effective at translating low-level hardware signals into actionable product decisions. Collected experience in both manufacturing and test systems gives him a rare end-to-end view from layout to large-scale production analytics.
16 years of coding experience
17 years of employment as a software developer
BS, Electrical Engineering, Philosophy, BS, Electrical Engineering, Philosophy at Rochester Institute of Technology
Santa Clara University