Kevin Massey is a TD Module & Integration Yield Engineer at Intel with 11 years of engineering experience and a 5-year focus in wet etch process development. He combines hands-on semiconductor process optimization with yield analysis to drive module integration improvements from lab to fab in Hillsboro, Oregon. A chemical engineering graduate from the University of Kansas, Kevin pairs experimental research experience—working on catalysts, biodiesel production, and instrument restoration—with practical tutoring and student leadership roles that sharpen communication and project management. Known for bridging detailed lab troubleshooting with cross-functional yield strategies, he brings a pragmatic, data-driven approach to reducing variability and improving manufacturability.
11 years of coding experience
3 years of employment as a software developer
Bachelor of Science - BS, Chemical Engineering, Bachelor of Science - BS, Chemical Engineering at University of Kansas - School of Engineering
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Kevin Massey - TD Module & Integration Yield Engineer