Kevin Schärer

Hardware, Software And FPGA Design Engineer at NetTimeLogic GmbH

Zurich, Zurich, Switzerland
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Summary

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Rockstar
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Top School
Kevin Schärer is a Hardware, Software and FPGA Design Engineer based in Zurich with two years of industry experience and an academic foundation from ETH Zürich in electrical engineering. He has progressed from internships and civil service software roles to engineering positions at NetTimeLogic, gaining hands-on FPGA and embedded systems expertise in industry-grade timing and networking solutions. Kevin combines low-level hardware design with software development skills, enabling him to bridge RTL, firmware, and system integration tasks effectively. His experience as a teaching assistant in Python and early roles in banking and healthcare software demonstrate breadth across domains and strong practical communication skills. Having completed military leadership training as a Gruppenführer, he brings disciplined team collaboration and operational responsibility to technical projects. Kevin is especially adept at turning academic knowledge into deployable hardware-software systems for time-sensitive applications.
code2 years of coding experience
job2 years of employment as a software developer
bookMaster of Science - MS Electrical Engineering and Information Technology, Master of Science - MS Electrical Engineering and Information Technology at ETH Zürich
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Github Skills (13)

ansible-collections9
synchronization8
cisco8
citrix8
monitor7
distribute7
juniper7
sdn6
monitoring5
distributed-systems5
load-balancing4
architectures4
data-center2

Programming languages (1)

C

Github contributions (5)

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kevin-schaerer/rust

Feb 2025 - Apr 2025

Empowering everyone to build reliable and efficient software.
Contributions:1 release, 2 pushes, 9 branches in 1 month
Develop an end-to-end hypothetical reference model, network architectures, performance objectives and the methods to distribute, operate, monitor time synchronization within data center and much more...
Contributions:4 pushes in 21 days
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Kevin Schärer - Hardware, Software And FPGA Design Engineer at NetTimeLogic GmbH