Summary
Keyang Liu is a DV engineer with nine years of experience specializing in digital design, ABMA bus protocol, clock domain crossing, and timing analysis, currently working at NIO in Shanghai. He holds an MEng in Electrical, Electronics and Communications Engineering from University College Dublin and graduated top of his class in Electronic Engineering from Dalian Maritime University. His background spans chip verification roles at UNISOC and a project coordination internship at Huawei, giving him cross-functional insight into both engineering and program delivery. A hands-on FPGA and algorithm enthusiast, he combines practical verification skills with a curiosity for algorithmic optimization often explored on his GitHub. Colleagues rely on him for robust DV strategies that bridge system requirements and silicon-ready implementations.
9 years of coding experience
3 years of employment as a software developer
Bachelor's degree, Electronic Engineer, A+(4.2), Bachelor's degree, Electronic Engineer, A+(4.2) at Dalian Maritime University
Master of Engineering - MEng, Electrical, Electronics and Communications Engineering, Master of Engineering - MEng, Electrical, Electronics and Communications Engineering at University College Dublin
English, Chinese