Summary
Kiran Das is an engineer-founder with a decade of experience building high-performance compute systems that blur hardware and physics, currently commercializing a patent-pending room-temperature device that physically settles AI inference. He cut his teeth on FPGA and SoC design across CERN, Nokia, Aalto University and IIT Kanpur, implementing low-latency L1 trigger logic, high-speed backplane links and 5G baseband blocks optimized for Intel Stratix. Kiran specializes in mapping complex problems into hardware so solutions emerge from system dynamics rather than iterative digital heuristics, and is hands-on from HDL/HLS to placement, timing and signal integrity. Based in Geneva, he combines experimental test-bed work (wideband ADCs, OOK receivers, cognitive radio) with production-grade engineering for demanding real-time systems. An uncommon thread in his career is translating theoretical wireless ideas into practical FPGA implementations that survive harsh timing and throughput constraints.
10 years of coding experience
5 years of employment as a software developer