Konrad Trifunovic is a Compiler Optimizations Engineer with 17 years of experience, specializing in GPU code generation and performance tuning at Intel. His background blends deep academic research—PhD work on polyhedral models, automatic parallelization and vectorization at Université Paris Sud and INRIA—with long-term industrial compiler development. At Intel he focuses on turning sophisticated analysis into practical backend optimizations that improve runtime efficiency on modern hardware. Earlier roles include contributing to GCC’s Graphite loop-parallelizing framework and research internships at IBM, reflecting a strong foundation in both theory and applied systems. Based in Gdynia, Poland, he brings a rare mix of operations-research rigor and production-grade engineering to compiler toolchains. Colleagues value him for translating advanced compilation techniques into measurable performance gains on CPUs and GPUs.
16 years of coding experience
6 years of employment as a software developer
M.Sc. Eng., computing science, M.Sc. Eng., computing science at West Pomeranian University of Technology in Szczecin
Doctor of Philosophy (PhD), Computer Science, tres honorable, Doctor of Philosophy (PhD), Computer Science, tres honorable at Université Paris Sud (Paris XI)
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