Krzysztof Biegański
Engineering Manager at Antmicro
Lower Silesian Voivodeship, Poland
Summary
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Rockstar🎓
Top SchoolKrzysztof Biegański is an Engineering Manager and former senior software engineer with 9 years of experience specializing in developer tooling, compilers, and compiler-like systems. Based in Lower Silesia, Poland, he has driven key contributions to major open-source hardware toolchains including Verilator, OpenROAD, Verible and a SystemVerilog frontend for Yosys, often delivering performance and feature optimizations used by the community. At Antmicro he progressed from implementing core Verilator features to overseeing feature development, internships, and public technical presentations, combining hands-on systems work with team leadership. His background includes cloud platform reliability at Siemens Digital Logistics and practical tooling for mobile network testing at Nokia, giving him a rare blend of low-level compiler expertise and production-grade platform experience. Notably, he’s authored niche utilities like astsee and sv-bugpoint that streamline debugging and test-case minimization for SystemVerilog workflows.
9 years of coding experience
8 years of employment as a software developer
Master's degree Computer Science, Master's degree Computer Science at Wrocław University of Science and Technology
English, Polish
Stackoverflow
1reputation
0reached
0answers
0questions
Github Skills (109)
verilog10
brightscript10
parser10
lexer10
simulator10
abstract-syntax-tree10
language-server-protocol10
gcc10
linter10
cpp10
xilinx10
formatter10
python-api10
preprocessor10
fpga10
Programming languages (11)
Github contributions (5)
kbieganski/vesuvius
Oct 2017 - Feb 2022
Contributions:23 pushes in 4 years 5 months
antmicro/OpenROAD
Jan 2024 - Feb 2025
OpenROAD's unified application implementing an RTL-to-GDS Flow. Documentation at https://openroad.readthedocs.io/en/latest/
Contributions:63 pushes, 20 branches in 1 year 1 month
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