Laurentiu Popa
Embedded Software Engineer at Analog Devices
Cluj-Napoca, Romania
Summary
🤩
Rockstar🎓
Top SchoolLaurentiu Popa is an embedded software engineer with six years of hands-on experience in embedded systems, FPGA HDL development, and IoT integration, currently working at Analog Devices after progressing from a software intern role. He graduated top of his class in Automation and Applied Informatics and is pursuing advanced studies in Cyber-Physical Systems and a PhD in Systems Engineering, blending rigorous academic training with practical product work. His contributions to widely used HDL libraries include system-level Verilog, SPI engine enhancements, and ODR generation—demonstrating strengths at the hardware-software boundary. Comfortable with C/C++, microcontroller toolchains, MATLAB/Simulink and system modeling, he pairs technical depth with a history of competitive academic engagement and collaborative project delivery. Beyond engineering, he pursues pedagogy coursework and writes literary texts, reflecting a rare mix of technical rigor and humanistic curiosity that informs his approach to problem solving.
6 years of coding experience
4 years of employment as a software developer
"Ion Luca Caragiale" National College PloiestiDoctor of Philosophy - PhD, Systems Engineering, Doctor of Philosophy - PhD, Systems Engineering at Technical University of Cluj Napoca
Github Skills (4)
hdl10
fpga10
verilog10
jes8
Programming languages (6)
Github contributions (5)
analogdevicesinc/hdl
Jun 2022 - Nov 2022
HDL libraries and projects
Role in this project:
Embedded Systems Engineer / IoT Developer
Embedded Systems Engineer / IoT DeveloperContributions:6 reviews, 15 commits, 22 PRs in 4 months
Contributions summary:Laurentiu primarily contributed to HDL (Hardware Description Language) code within the "hdl" repository, focused on FPGA (Field-Programmable Gate Array) and related hardware designs. Their commits involved modifying and creating system-level Verilog code, including system top modules and build file templates. They also updated the SPI engine hierarchy, trigger signals and ODR (Output Data Rate) generation for specific projects, indicating a focus on hardware design and integration.
fpgaasicjesd204bhdlvhdl
laurent-19/efac_labs
Mar 2025 - Mar 2025
Contributions:13 pushes, 1 branch in 7 days
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