Summary
Leandro De Souza Rosa is a postdoctoral researcher with nine years of experience specializing in high-level synthesis, hardware accelerators, and optimization methods for mapping C code to efficient FPGA implementations. His work blends hardware design, linear programming and compiler techniques—recently focusing on automatic selection of code snippets for hardware acceleration—built on a PhD in Mathematics and Computer Science from the University of São Paulo. He has applied his expertise across academia, including roles at TU Delft, IIT and Imperial College, and has hands-on experience with Kalman filters, systolic-array hardware for SLAM, genetic algorithms and image-processing pipelines. Based in Delft, he pairs rigorous theoretical modeling with practical HLS implementations, and is particularly strong at turning compiler-level insights into hardware-aware optimization strategies.
9 years of coding experience
2 years of employment as a software developer
Research Doctorate, Mathematics and Computer Science, Research Doctorate, Mathematics and Computer Science at The University Of São Paulo
Bachelor of Engineering - BE, Computer Engineering, Bachelor of Engineering - BE, Computer Engineering at Universidade de São Paulo / USP
Portuguese, English, Italian