Summary
Leonardo Suriano is a researcher and electronics engineer with eight years of experience specializing in reconfigurable hardware systems, high-performance computing, and embedded firmware. Based at Universidad Politécnica de Madrid, he has combined academic rigor (PhD with sobresaliente cum laude) with hands-on hardware design roles at Inria and Telecom Italia, tackling GPGPU, CUDA, FPGA acceleration and digital electronics. He excels at bridging algorithmic parallelism and low-level implementation, turning research prototypes into performant hardware-accelerated solutions. Comfortable across the full stack of electronics hardware design, firmware, and system architecture, he routinely works on advanced processing architectures and digital system design. His background includes international research exposure (École Polytechnique, University of Glasgow) and top academic honors that reflect both technical depth and a drive for continuous cultural and professional growth. Notably, he pairs rigorous research credentials with practical production responsibility, having led technical production in telecom hardware early in his career.
8 years of coding experience
6 years of employment as a software developer
Master in Electronic Engineering, 110/110 cum Laude, Master in Electronic Engineering, 110/110 cum Laude at Politecnico di Bari
The University of Glasgow
Liceo Scientifico R.Nuzzi, Italy
Doctor of Philosophy - PhD, Sobresaliente cum Laude, Doctor of Philosophy - PhD, Sobresaliente cum Laude at Universidad Politécnica de Madrid
English, Italian, Spanish, French