Summary
Lifeng Li is a seasoned CPU physical design and methodology engineer with 11 years of experience driving low-power SoC implementation and design flows across 40nm–16nm nodes. Currently at Apple and previously a senior methodology leader at Marvell, he blends hands-on physical synthesis, floorplanning, CTS, routing and timing closure with expertise in STA, DFT and power-grid analysis. He is fluent in Tcl, Perl, Python, C/C++ and build tooling, and has built and automated production flows from netlist to GDS. Known for translating complex timing and power constraints into reliable, repeatable flows, he pairs deep tool proficiency (Innovus, ICC2, Genus) with pragmatic scripting to accelerate tapeout.
11 years of coding experience
13 years of employment as a software developer
Bachelor, Electronic Engineering and Technology, 8, Bachelor, Electronic Engineering and Technology, 8 at Southeast University
English