Summary
Liming Gong is an ASIC power engineer with eight years of hands-on experience in silicon power modeling, optimization, management, integrity, validation and correlation across high-performance GPUs and accelerators. He has driven per-rail peak current projections, time-based energy modeling and power roll-ups at Apple and Groq, and now brings that expertise to NVIDIA’s silicon teams. His background spans RTL power analysis, power counter design, vdroop and PMU-focused stress testing, and practical silicon bring-up and debug from prior ASIC design roles. Comfortable bridging hardware and software, he also codes tools and automation (C++, Python, SystemVerilog) used for functional validation, compression/debug utilities and power analysis flows. Based in Austin, he pairs dual MS degrees in computer science and microelectronics with a foundation in applied physics to tackle cross-domain chip power challenges. Colleagues know him for turning complex, time-dependent power behaviors into actionable design fixes rather than just reports.
8 years of coding experience