Summary
Long Do is a Senior Staff Digital Design Engineer with eight years of focused experience in high-speed telecommunications and silicon design, currently driving RTL and timing-closure work at Marvell Technology. He has deep expertise in FPGA design, Verilog, logic synthesis and complex timing closure from roles at Inphi and Arrive Technologies, delivering production-ready IP for networking and connectivity applications. His background combines practical RTL implementation skills with a strong foundation in electronics and telecommunications from Da Nang University of Technology. Known for translating system-level requirements into synthesizeable, timing-robust designs, he thrives on optimizing critical-path logic and meeting aggressive performance targets. Based in Vietnam, he brings cross-company experience in both startup and large semiconductor environments, comfortable working on full-chip integration challenges. Outside day-to-day engineering he’s interested in bridging FPGA prototyping and silicon-ready RTL flows to accelerate product delivery.
7 years of coding experience
9 years of employment as a software developer
Bachelor's degree, Electronics and Telecomunication Engineer, Bachelor's degree, Electronics and Telecomunication Engineer at Da Nang University of Technology