Lorenzo Toscano
FPGA Design Engineer at Politecnico di Milano
Milan, Lombardy, Italy
Summary
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Senior🎓
Top SchoolLorenzo Toscano is an FPGA Design Engineer and PhD candidate in Electronics Engineering with 12 years of experience building high-throughput data acquisition systems, PCB layouts, and SDD detector readout electronics. He combines hands-on FPGA development and PCB design with system-level testing, mechanical development, and vendor-facing project management honed at Politecnico di Milano and MetaSensing. Lorenzo has authored multiple peer-reviewed publications, tutored electronics courses, and applied performance monitoring techniques during a research stint at the Barcelona Supercomputing Center. Comfortable in international, multidisciplinary teams, he leverages strong communication skills shaped by living and studying across Italy and Spain. He pairs academic rigor with practical skills—soldering SMD/PTH components to deploying FPGA logic—and maintains an active interest in AI research and software engineering through personal GitHub work. Colleagues value him for turning complex detector and high-throughput challenges into robust, testable systems.
12 years of coding experience
Bachelor of Science (B.Sc.) Electronics and Telecommunications Engineering, Bachelor of Science (B.Sc.) Electronics and Telecommunications Engineering at Politecnico di BariScientific studies, Scientific studies at Liceo Il PontormoUPC Universitat Politècnica de CatalunyaDoctor of Philosophy - Ph.D. Candidate in Electronics Engineering, Doctor of Philosophy - Ph.D. Candidate in Electronics Engineering at Politecnico di MilanoHigh School Diploma Scientific studies, High School Diploma Scientific studies at Liceo Archita
English, Spanish, ItalianProgramming languages (1)
Github contributions (5)
ltoscano/ponvif
Nov 2013 - Jun 2014
Contributions:6 commits, 1 comment in 6 months
ltoscano/apprendimentoautomatico-wpblog
Jan 2018 - Jul 2018
Contributions:5 pushes, 1 branch in 6 months
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