Louis Chen
FPGA Design Engineer at ADE Technology Inc.
Toronto, Canada Area
Summary
👤
Senior🎓
Top SchoolLouis Chen is an FPGA Design Engineer and fourth-year Electrical & Computer Engineering student at the University of Toronto with nine years of hands-on experience in hardware and mixed-signal design. He currently develops FPGA solutions at ADE Technology and has interned in analog design at Semtech, where he designed CMOS bias circuits, performed extensive post-layout verification, and automated test/data workflows with SKILL, Python and LabView. Louis has experience synthesizing software functions into hardware accelerators from university research and a practical knack for bridging transistor-level detail with RTL/IP development. He combines rigorous simulation and layout verification practices (DRC/LVS, RCC extraction, EMIR) with pragmatic scripting to speed design iterations, and has contributed signal-pattern generation tools used for SDI testing. Based in Toronto, he’s motivated by ethical engineering that leverages hardware/software co-design to deliver robust, real-world systems.
9 years of coding experience
1 year of employment as a software developer
Bachelor of Applied Science - BASc (Honours) / Engineering Business Certificate, Electrical and Computer Engineering, Bachelor of Applied Science - BASc (Honours) / Engineering Business Certificate, Electrical and Computer Engineering at University of Toronto
Japanese, Chinese, EnglishGithub contributions (5)
louistjchen/2048-Game
Feb 2017 - Dec 2018
Contributions:11 pushes, 1 branch in 1 year 10 months
louistjchen/Analytical-Placer
Nov 2018 - Nov 2018
Contributions:4 commits, 3 pushes, 1 branch in 26 days
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