Lucas Amaral is a staff-level software engineer and product-minded architect with 11 years building low-latency, performance-critical telecom and networking systems in modern C++. He designs and ships carrier-scale dataplanes and control planes (16M+ sessions) end-to-end—from protocol stacks (PFCP, GTP‑U) and kernel modules to asynchronous gRPC control planes and production deployment tooling. He moves fluidly between ASIC/RTL work and software, having designed RTL for AI accelerators and SPI interfaces while also migrating packet pipelines from Python to C++17 for deterministic performance. An active open-source contributor and Magma TSC member, he blends hands-on implementation detail with system-level design and mentorship, and favors pragmatic datapath acceleration choices like eBPF/XDP with AF_XDP for near-DPDK performance on smaller hardware footprints. Based in São Paulo (BRT), he is open to senior staff/principal C++ systems roles with flexible overlap across US and Europe.
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